October 30, 2024
9:00 am to 05:30 pm
Rohde & Schwarz GmbH & Co KG
Mühldorfstrasse 15
81671 Munich
Entrance: Mühldorfstrasse 15
Language: English
The number of participants is limited
Effective signal integrity measurement techniques
High-speed digital interfaces such as USB, PCI-Express or high-speed Ethernet present unique measurement challenges. Not only is it difficult to accurately connect the signals to T&M instrumentation such as oscilloscopes, but the significant impact of interconnects and test fixtures need to be accurately evaluated for techniques such as de-embedding and equalization to be effective. This seminar will explore methods and best practices for measuring, compensating interconnects and test fixtures to provide the most accurate measurement results.
What will you learn?
- Unique SI and PI debugging tools
- Compensating oscilloscope measurements of serial data signals using inverse FIR filtering
- De-embedding with VNA and Oscilloscope
- AM-N Analysis for automotive Ethernet
- DDR5 SI debugging and compliance test
- And many more
Please join our complimentary seminar with lunch provided!
Don´t miss out and register now. We are looking forward to meeting you in person.
Your Rohde & Schwarz Team
Agenda
Tuesday, October 30, 2024 | |||
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Time (CET) | Topic | ||
08:30 - 09:00 | Registration | ||
09:00 | Welcome Stefan Zollner, General Manager Rohde & Schwarz Vertriebs GmbH |
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09:10 | Keynote Speech “Development history of oscilloscopes @R&S” Dr. Wolfgang Herbordt, Director of R&D Oscilloscopes |
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09:30 - 11.30 w/coffee break |
If compliance test fails:
Learn about unique SI & PI debugging tools
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11:30 | Overview of compliance test for calbes and connectors Vector Network Analyzer based automated test solutions |
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12:00 | LUNCH | ||
13:00 |
Redefining De-Embedding
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14:00 | Embedding & Equalization Emulation of signal distrotion & signal recovery |
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14:30 | COFFEE BREAK | ||
15:00 | PAM-N Analysis for automotive ethernet·
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15:45 |
DDR5 Analysis
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16:30 | NETWORKING & LIVE DEMOS with "beer & brezn" | ||
17:30 | END |