SEMINAR: ACCELERATING YOUR EMBEDDED DESIGN INSIGHTS
  • {dl}
    {dnn}
  • {hl}
    {hnn}
  • {ml}
    {mnn}
  • {sl}
    {snn}

ACCELERATING YOUR EMBEDDED DESIGN INSIGHTS

DDR Memory Workshop

Date
Date
25-Aug-2023
Country
Rohde & Schwarz Singapore office

9 Changi Business Park Vista

Info
9:00am – 3.30pm (Singapore time)

Join us for a full-day seminar dedicated to exploring the latest advancements in Memory Technology, with a particular focus on DDR (Double Data Rate) memory. At this event, we will address the measurement challenges encountered when working with DDR and introduce cutting-edge methodologies to tackle these obstacles. The seminar begins with an introduction to Memory Technology, highlighting the significance of DDR in enhancing data transfer rates and overall system performance. We then dive into the complexities of measuring DDR signals, discussing the impact of high-speed data transfer and signal integrity issues.

To overcome these challenges, we present two powerful measurement methodologies: DDR eye and de-embedding. The DDR eye diagram allows for visualizing signal quality in high-speed data links, facilitating the identification of potential issues and optimization of system performance. Additionally, the de-embedding technique enables precise measurement and characterization of DDR components, eliminating the influence of connectors and interconnects. By the end of the seminar, participants will have a comprehensive understanding of DDR measurement challenges and the advanced methodologies employed to address them.

Register now. Seats are limited.

Registration deadline: 18 August 2023

Topics

  • Memory Technology: Developments and Trends
  • Measurement challenges in DDR
  • Advanced DDR measurement methodologies – Advance Eye, De-embedding

What You’ll Learn

  • Gain a deeper understanding of DDR (Double Data Rate) memory technology, its evolution, and its significance in enhancing data transfer rates and system performance.
  • Identify and comprehend the measurement challenges associated with DDR, such as high-speed data transfer and signal integrity issues, and their impact on system reliability.
  • Learn how to visualize and access signal quality in high-speed data links using the DDR eye diagram, enabling the identification of potential issues and the optimization of system performance.

Who should attend

  • Electronic Design Engineer
  • Signal Integrity Engineer
  • Product Planner
  • Technical staff
  • Lab officer

Speakers

Guido Schulze

Guido Schulze

Product Manager, Oscilloscope – Rohde & Schwarz

Guido Schulze has more than 25 years of experience in high-speed digital testing. For the last fifteen years, he has worked as a product manager for the oscilloscope product division at Rohde & Schwarz. He specializes in high-end models and their respective applications.

Tristen Tan

Tristen Tan

Regional Product Manager, Oscilloscope – Rohde & Schwarz

Tristen Tan has over 20 years of experience in Test and Measurement. Currently at Rohde & Schwarz, he takes care of the Regional Oscilloscope Product and Business Development Role. In his early career, he worked on High-Speed Serial, Power Integrity, and Vector Signal Analysis in the time domain. Tristen graduated from The University of Queensland with a BEng (Hons) in Electronics Engineering.

Heng Wee Boo

Heng Wee Boo

Senior Engineer, Regional Application – Rohde & Schwarz

Heng Wee Boo is a specialist in Vector Network and Time Domain Analysis in Rohde & Schwarz. His experience in test and measurement field of the aerospace & defense market made him a knowledgeable consultant in various projects in the Asia Pacific region. As a qualified trainer at Rohde & Schwarz, he actively supports and conducts trainings for R&S products in the region. Heng graduated with a BEng (Hons) in Electronics Engineering from University of South Australia and has been in the industry since 2001.